One type of a conventional booster circuit is shown in FIG. 1, and comprises first and second N channel MOS-FETs (called "N.sub.11 " and "N.sub.12 " hereinafter), an inverter IN.sub.11, and a capacitance element C. The MOS-FET N.sub.1 has a drain connected to an output terminal OUT, a gate connected to a first signal terminal T.sub.11, and a source connected to a first power supply voltage of a ground potential GND. The MOS-FET N.sub.2 has a gate connected through the inverter IN.sub.11 to the first signal terminal T.sub.11, a drain connected to a second power supply terminal of a voltage Vcc and a source connected to the output terminal OUT. The capacitance element C is connected at one terminal to a second signal terminal T.sub.12 and at the other terminal to the output terminal OUT.
In operation, when a first signal of "high" is applied to the first signal terminal T.sub.11, the N.sub.11 is "on" (conductive), while the N.sub.12 is "off"(non-conductive), so that an output signal V.sub.OUT of "low" is obtained at the output terminal OUT, as shown in FIG. 2. Next, when the first signal becomes "low", the N.sub.11 is turned off, while the N.sub.12 is turned on, so that the output signal V.sub.OUT of "Vcc-V.sub.TN " is obtained at the output terminal, as shown in FIG. 2. The voltage "V.sub.TN " is a threshold voltage of an N channel MOS-FET. When the second signal becomes "high", the output signal V.sub.OUT is increased at the output terminal OUT to "2Vcc-V.sub.TN " due to the presence of the capacitance element C.
In the conventional booster circuit, the N.sub.12 and the capacitance element C may be replaced by third to fifth N channel MOS-FETs (called "N.sub.13 ", "N.sub.14 " and "N.sub.15 " hereinafter) and first and second capacitance elements C.sub.11 and C.sub.12, as shown in FIG. 3. The MOS-FET N.sub.13 has a gate connected to the inverter IN.sub.11 which is connected to the first signal terminal T.sub.11, a drain connected to the second power supply terminal of the voltage Vcc, and a source connected to a first connecting point 11 for connecting a drain and a gate of the N.sub.14 and the first capacitance element C.sub.11. The source of N.sub.14 is connected to a second connecting point 12 for connecting a drain and a gate of the N.sub.15 and the second capacitance element C.sub.12, and the source of N.sub.15 is connected to the output terminal OUT. In addition, the first capacitance element C.sub.11 is connected at one terminal to a first clock signal terminal .phi., and the second capacitance element C.sub.12 is connected at one terminal to a second clock signal terminal .phi.. Consequently, the third to fifth N channel MOS-FETs (N.sub.13 to N.sub.15), and the first and second capacitance elements C.sub.11 and C.sub.12 thus connected provide a charge pump circuit. A clock signal applied to the second clock signal terminal .phi. is an inverted signal of a clock signal applied to the first clock signal terminal .phi..
In operation, a voltage of the first connecting point 11 is charged up to "Vcc-V.sub.TN " by the N.sub.13, and this voltage is pushed up to "2Vcc-V.sub.TN " by the first capacitance element C.sub.11. The pushed-up voltage of "2Vcc-V.sub.TN " is charged up to "2Vcc-2V.sub.TN " at the second connecting point 12 by the N.sub.14. This charge-up voltage of "2Vcc-2V.sub.TN " is further pushed up to "3Vcc-2V.sub.TN " by the second capacitance element C.sub.12, and this voltage of "3Vcc-2V.sub.TN " is charged up to "3Vcc-3V.sub.TN " at the output terminal OUT by the N.sub.15.
In the second conventional booster circuit, the charge pump circuit includes a two-stage structure consisting of the N.sub.14 and the first capacitance element C.sub.11, and the N.sub.15 and the second capacitance element C.sub.12. As understood from the above, if the charge pump circuit includes an N-stage structure, where N is an integer, a voltage is increased to (N+1).(Vcc-V.sub.TN).
However, the first type of the conventional booster circuit has a disadvantage in that the maximum voltage is limited to a voltage of "2Vcc-V.sub.TN " at the output terminal OUT, because the charge-up oltage of the N.sub.12 is limited to a voltage of "Vcc-V.sub.TN ", although a voltage of the output terminal is increased simultaneously, when the signal of the second signal terminal T.sub.12 becomes "high".
On the other hand, the second type of the conventional booster circuit can boost the output terminal OUT up to a voltage twice or more as large as Vcc. However, this circuit has a disadvantage in that it takes a considerable time to obtain a predetermined voltage at the output teminal OUT, because the clock signals .phi. and .phi. has to be employed. For instance, where a period of the clock signals is 1 .mu.sec, it takes 10 .mu.sec equivalent to ten periods of the clock signals to provide the predetermined voltage at the output terminal OUT. Increasing the number of stages in the charge pump circuit to make an output voltage higher makes the time longer proportionally.